SIG (Hardware), MCPA
Monday, November 13, 2006
Saturday, November 04, 2006
PCI Express Technology & Intel Virtualization Technology
SIG Hardware WorkshopPCI Express Technology & Intel Virtualization Technology
Presented By U Hla Kaung (MCPA)
29th October 2006
Click here to download Powerpoint presentation
Wednesday, October 25, 2006
SIG Seminar Schedule for Nov & Dec 2006
Dear Sir/Madam,The following are the SIG Seminar Schedule for November & December 2006.
Graphics - 5.11.2006(1PM)U Myint Aung Chit
Linux - 12.11.2006(1PM)U Aung Kyaw Soe
Hardware - 19.11.2006(1PM)U Hla Kaung
Programming -3.12.2006(1PM)Daw Myat Zin Htet
Linux - 10.12.2006(1PM)U Aung Kyaw Soe
Graphic - 17.12.2006(1PM)U Myint Aung Chit
Hardware - 7.1.2006 (1PM)U Hla Kaung
Sunday, October 08, 2006
Intel® Virtualization Technology
This is from Intel Technology Journal.Saturday, September 30, 2006
Wednesday, September 27, 2006
bo bo wai maung gives a topic for sig-hardware
Sep 26while thinking abt what to write out for a topic, some thoughts of what i encounterd this breakfast time are coming up in procedual trails: FPGA based PCI express for 64bit processing environment, Intel's IXP processor for network processing, information integrated power management for wireless sensor network and crush-free RTOS framework. But finally made up my mind to figure out some of the fundamental concepts and product knowledge of this week hot controller Microchip PIC18F97J60.it is just a MIPS based 8bit MCUs but optimized for remote communication based embedded solution. it means it has IEEE 802.3 compliant Ethernet based on-chip PHY and MAC controller.well let's stop here abt product.
do u understand what i described before?
MCU - it is microcontroller unit which integrate microprocessor, RAM, ROM (for firmware) and other IO module into a single chip. so we sometimes call (system on chip)
MIPS - it stands for Microprocessor without interlocked pipeline stage. it is a kind of RISC architecture and its annual production is higher than that of Intel x386 based microporcessors.well we normally use pipeline to fully utilise the processing resource and meanwhile use interlock to avoid the harzard such as "load to use".but interlock again makes the system waste its precious work cycles. So MIPS design comes to play to compromise these drawback while removing interlock and making changes in micro instructions.
if u dont get something above, just mail me or find on the web. thanks.
ps all things above and next posts are just my thoughts and opnions. i wont be responsible for correctness of above and coming definations and facts.
Sunday, September 24, 2006
Bo Bo Wai Maung said...
Bo Bo Wai Maung said...last discussion on 64 bit was a success. but from my point of views, we still need to enhance our group to
1. get more interactions among audience, if u can u need to run one lesson abt how to take part in discussion.
2. more focus on fundamental and academic knowledge rather than business and application related knowledge.
3. all the participants must observe this is not teaching kind of discussion but helping out to discover the necessary knowledge. That means people must learn abt the topic in advance.
well i wont be attending to the next discussions cos i am now back to sg. i am a Research Officer from A*star. if u need help, dont hesitate to mail me. my interest is wireless sensor networks, linux programming, OS architecture. but i am now doing over 802.16 wimax implementation.